diff options
Diffstat (limited to 'arch/arm64/kernel/boot.S')
| -rw-r--r-- | arch/arm64/kernel/boot.S | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm64/kernel/boot.S b/arch/arm64/kernel/boot.S new file mode 100644 index 0000000..8c656b1 --- /dev/null +++ b/arch/arm64/kernel/boot.S @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * boot.S - the final jump to the payload. x0 = dtb, x1 = x2 = x3 = 0, + * MMU and caches off, D cache flushed, I cache invalidated. that is + * the whole contract from Documentation/arch/arm64/booting.rst. + * + * Copyright (C) 2026 Bradley Morgan <brads@mainlining.org> + */ + +#include <asm/linkage.h> + +.pushsection .text.tb_boot_linux, "ax" +ENTRY(tb_boot_linux) + /* ep in x0, dtb in x1, per the kernel boot protocol */ + mov x8, x0 + mov x0, x1 + mov x1, xzr + mov x2, xzr + mov x3, xzr + + /* clean the caches so the kernel reads the image from RAM */ + bl tb_flush_dcache_all + bl tb_invalidate_icache_all + + /* MMU off, caches off, the kernel sets up its own state */ + mrs x9, sctlr_el1 + bic x9, x9, #(1 << 0) /* M, MMU */ + bic x9, x9, #(1 << 2) /* C, D-cache */ + bic x9, x9, #(1 << 12) /* I, I-cache */ + msr sctlr_el1, x9 + isb + + br x8 +ENDPROC(tb_boot_linux) +.popsection |
