From 5ff54a875642962fc857cee00bde17f9a465f1fa Mon Sep 17 00:00:00 2001 From: Bradley Morgan Date: Sun, 4 Oct 2026 10:42:10 +0000 Subject: tashaboot: arm64 bootloader holy shit it's here, Tashaboot, based from arm arm, enjoy reading this masterpiece Signed-off-by: Bradley Morgan --- arch/arm64/lib/system.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 arch/arm64/lib/system.c (limited to 'arch/arm64/lib/system.c') diff --git a/arch/arm64/lib/system.c b/arch/arm64/lib/system.c new file mode 100644 index 0000000..25af2bf --- /dev/null +++ b/arch/arm64/lib/system.c @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * system.c - system power control, the PSCI SYSTEM_OFF and + * SYSTEM_RESET backends. off parks the core in WFI forever, the + * manual's low power entry (D1-2255). reset drives the PE reset + * domain: RMR_EL2 reset request with the system reset bit, RR bit 1, + * followed by a barrier pair so the request retires before anything + * else observes the core. + * + * On real hardware a SoC also needs a watchdog or PMIC write for a + * full board reset, that is board territory, the arch part is this. + * + * Copyright (C) 2026 Bradley Morgan + */ + +#include +#include + +void tb_system_off(void) +{ + dprintf(ALWAYS, "system off\n"); + + for (;;) { + asm volatile("wfi"); + } +} + +void tb_system_reset(void) +{ + uint64_t rmr; + uint64_t el; + register uint64_t r0 asm("x0") = 0x84000008; + register uint64_t r1 asm("x1") = 0; + register uint64_t r2 asm("x2") = 0; + register uint64_t r3 asm("x3") = 0; + + dprintf(ALWAYS, "system reset\n"); + + /* + * the firmware conduit first, PSCI SYSTEM_RESET through + * the machine's own monitor. this is the only legal way + * up from EL1: RMR_EL1 is undefined on hardware that + * implements a higher exception level, the access traps + * and the machine never resets. + */ + asm volatile("smc #0" + : "+r"(r0), "+r"(r1), "+r"(r2), "+r"(r3)); + + /* + * no monitor answered, or it refused. ask the reset + * domain directly from a level that may write it. + */ + asm volatile("mrs %0, CurrentEL" : "=r" (el)); + el >>= 2; + + if (el >= 2) { + asm volatile("mrs %0, rmr_el2" : "=r" (rmr)); + rmr |= (1 << 1); /* RR, request reset */ + asm volatile( + "msr rmr_el2, %0\n" + "dsb sy\n" + "isb\n" + :: "r" (rmr)); + } + + /* nothing worked, park */ + for (;;) { + asm volatile("wfi"); + } +} -- cgit v1.2.3