From 00fc82f17cff9295387d516384ecdc443acb1b22 Mon Sep 17 00:00:00 2001 From: Bradley Morgan Date: Sat, 3 Oct 2026 18:57:38 +0000 Subject: tashaboot: arm64 bringup, semihosting payload loader consoles on the pl011 the dtb points at, walks the memory node and chosen, loads an arm64 kernel Image over semihosting and jumps to it with the documented register state. string functions, printf and libfdt are vendored from lk (lk2nd) and u-boot so the libc surface is the one those projects already proved. built and booted on qemu virt, payload exits clean through semihosting. --- include/reg.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 include/reg.h (limited to 'include/reg.h') diff --git a/include/reg.h b/include/reg.h new file mode 100644 index 0000000..321074b --- /dev/null +++ b/include/reg.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * reg.h - mmio accessors. ld/st straight to the device, nothing cute. + * + * Copyright (C) 2026 Bradley Morgan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __REG_H +#define __REG_H + +#include +#include + +#define REG32(addr) ((volatile uint32_t *)(uintptr_t)(addr)) + +static inline void writel(uint32_t v, volatile void *addr) +{ + *(volatile uint32_t *)addr = v; +} + +static inline uint32_t readl(const volatile void *addr) +{ + return *(const volatile uint32_t *)addr; +} + +static inline void writew(uint16_t v, volatile void *addr) +{ + *(volatile uint16_t *)addr = v; +} + +static inline uint16_t readw(const volatile void *addr) +{ + return *(const volatile uint16_t *)addr; +} + +static inline void writeb(uint8_t v, volatile void *addr) +{ + *(volatile uint8_t *)addr = v; +} + +static inline uint8_t readb(const volatile void *addr) +{ + return *(const volatile uint8_t *)addr; +} + +#endif -- cgit v1.2.3