/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * system.c - system power control, the PSCI SYSTEM_OFF and
 * SYSTEM_RESET backends. off parks the core in WFI forever, the
 * manual's low power entry (D1-2255). reset drives the PE reset
 * domain: RMR_EL2 reset request with the system reset bit, RR bit 1,
 * followed by a barrier pair so the request retires before anything
 * else observes the core.
 *
 * On real hardware a SoC also needs a watchdog or PMIC write for a
 * full board reset, that is board territory, the arch part is this.
 *
 * Copyright (C) 2026 Bradley Morgan <brads@mainlining.org>
 */

#include <debug.h>
#include <stdint.h>

void tb_system_off(void)
{
	dprintf(ALWAYS, "system off\n");

	for (;;) {
		asm volatile("wfi");
	}
}

void tb_system_reset(void)
{
	uint64_t rmr;

	dprintf(ALWAYS, "system reset\n");

	asm volatile("mrs %0, rmr_el2" : "=r" (rmr));
	rmr |= (1 << 1);	/* RR, request reset */
	asm volatile(
		"msr	rmr_el2, %0\n"
		"dsb	sy\n"
		"isb\n"
		:: "r" (rmr));

	/* if the reset domain ignores us, park */
	for (;;) {
		asm volatile("wfi");
	}
}