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authorBradley Morgan <brads@mainlining.org>2026-10-04 06:15:45 +0000
committerBradley Morgan <brads@mainlining.org>2026-10-04 06:15:45 +0000
commit499e9137526648f72373cce873633b407393071d (patch)
treea71258043dec5c66784e1620b965586032c9fe3c /common/main.c
parent4256361421a2d857e8a1d5cdef45bdbcfef477ad (diff)
tashaboot: console base from the devicetreeHEADmain
The uart address was the last board hardcode. The console probe now walks the dtb for the pl011 node and reads its first reg pair before the first print, the same walker the gic lookup uses. The qemu default remains as the dev path fallback for a tree without the node. receipt: banner and every print on the dtb base, full boot to the busybox shell, four cpus.
Diffstat (limited to 'common/main.c')
-rw-r--r--common/main.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/common/main.c b/common/main.c
index cb13ef1..b53c4b0 100644
--- a/common/main.c
+++ b/common/main.c
@@ -67,6 +67,23 @@ void tashaboot_main(uintptr_t fw_arg)
struct tb_image img;
int ret;
+ /*
+ * the console uart the machine named, before the first
+ * print. the base is the first reg pair of the pl011
+ * node, the same walk the gic used, no board hardcodes.
+ */
+ {
+ extern int tb_dtb_find_reg0(uintptr_t dtb,
+ const char *name,
+ uintptr_t *addr, size_t *size);
+ extern void tb_console_set_pl011(uintptr_t base);
+ uintptr_t uart = 0;
+ size_t usz = 0;
+
+ if (tb_dtb_find_reg0(fw_arg, "pl011", &uart, &usz) == 0)
+ tb_console_set_pl011(uart);
+ }
+
if (tb_console_init())
return;