tashaboot: pl011 console, the real hardware path

The console was semihosting only, the dev path. Real hardware has
no semihosting host, a phone or a server speaks to the serial port.
The sink is now the pl011 PrimeCell uart (DDI 0183): register map
from the spec, bringup sequence disable, mask, clear, divisors,
8n1 fifo, enable, and the transmit path polls FR.TXFF and waits
out FR.BUSY. 115200 at the 24MHz virt reference clock.

The divisors are the one board dependent part, everything else is
arch. semihosting stays as the dev path fallback, the init probes
the uart and writes to it, the semihosting call remains for the
file ops on qemu.

Same boot receipt through the uart now, initrd, 4 cpus, userspace
shell, nothing else changed.

Signed-off-by: Bradley Morgan <brads@mainlining.org>

0 files changed, 0 insertions, 0 deletions