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authorBradley Morgan <brads@mainlining.org>2026-10-04 02:24:47 +0000
committerBradley Morgan <brads@mainlining.org>2026-10-04 02:24:47 +0000
commitbe4565f1fe3de7e16a48688ab8da39c433f0fee3 (patch)
treee8e8a4bc2ea0861f6e1d6c5e8011ea11b4abaea4 /lib/string/strcpy.c
parent871e4d1551ac8c5be4339e4a3129c45014e613b5 (diff)
tashaboot: gic init and the devicetree reg walker
The interrupt controller state the kernel inherits is the bootloader's to define. On real hardware the secure world owns which interrupts the non-secure kernel will ever see, and a distributor left with random enables or secure group bits can fire before the kernel's irqchip driver is up. The gic goes into the defined state here, distributor off, every line in the non-secure group, per interrupt enables, pending and active cleared, cpu interface off. The kernel programs everything it runs with itself, it starts from zero instead of from whatever the last stage left. The controller is found in the devicetree, no hardcoded address. The new walker locates a node by name at any depth and decodes the first reg pair with the root cell counts, the same parse the kernel does. The node's own begin token starts the walk at depth zero, starting at one skips every prop in the node, the first version matched nothing. receipt: gic 8000000 off, root irq handler gic_handle_irq, smp brought up 1 node 4 cpus, run /init, busybox shell, the uart console driven by irq 14 through the gic the kernel reprogrammed over our off state.
Diffstat (limited to 'lib/string/strcpy.c')
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